Memory Design Engineer Resume
Summary : As a Memory Design Engineer, provide design solutions for meeting challenging memory design specs for various product segments, Memory Compiler Design Flow/Methodology development, Design, validation, and characterization of Memory Compilers, and Interfacing with customers.
Skills : Circuit Design, Digital Design.
Description :
- Worked on a scripting language (Perl, tcl) to develop a memory compiler and support or enhance the tool as required.
- Expert in memory design convergence tools including formal equivalence verification, static timing methodology, electrical reliability, and robustness analysis.
- Expert in transistor-level operation, memory bit cell design, design challenges under process variations, and low-power circuit techniques.
- Drove design and development of SRAM, register file, and custom cells to enable high-performance and low-power designs.
- Worked with the micro-architecture team to gather specifications and drive optimal implementation.
- Conducted early sizing estimates and PPA analysis and designed entries and simulations for optimal design sizing.
- Designed equivalence checking using the latest industry-standard LEC tools.
Experience
10+ Years
Level
Management
Education
BSEE
Memory Design Engineer Resume
Objective : As a Memory Design Engineer, working as part of the Physical design team means working on leading-edge high-performance, high-density, low-power, and ultra-low-power memory compilers that are optimized for each silicon technology.
Skills : Analog Design, EDA Tools.
Description :
- Worked closely with mask designers on custom design implementation, DFM, and yield enhancement features.
- Collaborated with the CPU and SoC Physical design teams on floor planning, placement, timing, and power closure of the custom design.
- Interacted with the technology team, and participated in developing design and test plans.
- Collaborated with CAD teams and drove design flow enhancements.
- Supported design validation and verification, reticle experiments, and required tape-out revisions.
- Performed verification processes with modeling and simulation using industry-standard simulators.
- Contributed the development of new DRAM, emerging memory products, and IPs by enabling the overall design, layout, and optimization of Memory/Logic/Analog circuits.
Experience
2-5 Years
Level
Executive
Education
BSCE
Assistant Memory Design Engineer Resume
Objective : As an Assistant Memory Design Engineer, design, simulate, and characterize full custom circuits for NVM memories (MTPM/OTP/MRAM/SRAM/eFlash), leaving your mark on every bit.
Skills : VLSI Design, Memory Architectures.
Description :
- Experienced with the most advanced technology nodes up to 28nm and below.
- Understood margining of memory bit cell and /or analog circuits for yield improvement.
- Evaluated and optimized performance, power, area, and leakage of circuits.
- Created and maintained product specifications.
- Collaborated with the silicon bring-up team, fine-tuning the creations for optimal real-world performance.
- Shared expertise in design and layout reviews, contributing to a culture of continuous improvement.
- Proposed innovative solutions to design challenges and drive the future of memory technology.
Experience
2-5 Years
Level
Junior
Education
BSCE
Associate Memory Design Engineer Resume
Objective : As an Associate Memory Design Engineer, design architecture and circuit implementation, especially ultra-high speed, ultra-low power, or high-density design portfolio.
Skills : Scripting, Problem-solving.
Description :
- Followed all the process and practices applicable for his/her designation.
- Fostered close collaboration with IP design and layout teams, creating a symphony of innovation.
- Designed cutting-edge SRAM circuits using state-of-the-art technology processes.
- Optimized circuits for performance, area, and power.
- Performed transistor level circuit and logic design, spice verification, schematic entry and coordination with layout team.
- Developed state-of-the-art flows for timing, EM/IR or other verification needs.
- Improved/developed flows, methodologies and automation to accelerate various design closure, data collection, and analysis, further ensure working silicon.
Experience
2-5 Years
Level
Junior
Education
BSCE
Senior Memory Design Engineer Resume
Summary : As a Senior Memory Design Engineer, designing and implementing Low-power, high-performance, area-efficient embedded memory (CPUL1/L2, SRAM, register files) circuits and architectures.
Skills : Collaboration and attention to detail.
Description :
- Developed CMOS-embedded memories such as SP SRAM, DP SRAM, Register File, and ROM.
- Performed schematic entry, circuit simulation, layout planning, layout supervision, design verification, and validation.
- Interfaced with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow.
- Performed bit cell development and bit cell verification, and drove physical layout design and verification.
- Provided support and/or performed other duties as assigned and required.
- Responsible for overall IP product delivery to compiler release.
- Proactively sought out and proposed innovative solutions to SRAM design issues in the past.
Experience
7-10 Years
Level
Senior
Education
BSCE
Junior Memory Design Engineer Resume
Objective : As a Junior Memory Design Engineer, develops memory architectures and circuit implementation techniques. This includes schematic entry, simulation of major blocks, layout planning, layout supervision, and interface with the CAD team for full verification and model generation.
Skills : RTL Design, Timing Analysis.
Description :
- Collaborated as part of a Memory Design team to design, analyze, and verify SRAM integrated circuit memories.
- Learned and utilized state-of-the-art tools and flows.
- Analyzed design and creation of test benches to test the functionality of the design (simulation and verification).
- Collaborated with the product engineering team on debugging and characterization of silicon test vehicles.
- Worked in partnership with the layout to produce optimal physical implementations.
- Designed and developed innovative memory technologies that meet the high standards of Intel's products.
- Collaborated with a team of engineers to push the boundaries of technology and drive innovation.
Experience
2-5 Years
Level
Junior
Education
BSEE
Memory Design Engineer Resume
Objective : As a Memory Design Engineer, responsible for designing, developing, and validating cutting-edge memory technologies that power our industry-leading products.
Skills : Power and Signal Integrity, Memory Characterization.
Description :
- Conducted thorough research and analysis to identify areas for improvement and optimize existing memory designs.
- Developed and implemented design methodologies and processes to ensure efficient and effective memory design.
- Created and reviewed detailed design specifications and ensured compliance with industry standards.
- Utilized simulation and modeling tools to validate memory designs and identify potential issues.
- Troubleshot and debugged any issues that arise during the design and development process.
- Kept up-to-date with the latest advancements in memory technology and incorporated them into design processes.
- Collaborated with cross-functional teams to ensure seamless integration of memory designs.
Experience
2-5 Years
Level
Executive
Education
BSEE
Memory Design Engineer Resume
Objective : As a Memory Design Engineer, responsible for embedded SRAM design and will also work with the team to verify the designs for robustness.
Skills : Design for Manufacturability (DFM), Design Automation.
Description :
- Continuously assessed and improved memory design processes to drive efficiency and productivity.
- Communicated progress and updated project stakeholders and senior management.
- Adhered to strict quality and safety standards while designing memory technologies.
- Mentored and guided junior engineers to foster their professional growth.
- Participated in industry conferences and events to stay updated on emerging memory technologies and shared knowledge with the wider community.
- Conducted circuit modeling, and sensitivity analyses, and assisted in design validation using industry-standard simulators and tools in the past.
- Oversaw and managed the layout process including floor-planning, placement, and routing.
Experience
2-5 Years
Level
Freelancer
Education
BSEE
Memory Design Engineer Resume
Summary : As a Memory Design Engineer, contributing to the development of new product opportunities by assisting with the overall design, architecture definition, layout, and optimization of Memory or Analog Circuits/Logic.
Skills : Cross-Functional Collaboration, Documentation and Reporting.
Description :
- Supported Silicon bring-up and characterization.
- Participated in implementation and design/layout reviews.
- Contributed to innovative ideas for addressing design problems.
- Worked closely and collaborated with IP design and layout teams.
- Responsible for designing and delivering custom circuits from scratch.
- Understood priority and optimized circuits for speed, capacitance, power, and area.
- Responsible for developing and testing digital and analog circuits for memory compilers/instances.
Experience
7-10 Years
Level
Consultant
Education
BSEE
Memory Design Engineer Resume
Summary : As a Memory Design Engineer, developing memory compilers and memory-fast cache instances for our next generation Cores achieving outstanding PPA.
Skills : Quality and Reliability Assurance, Continuous Learning.
Description :
- Designed new products from scratch and improved existing designs, ensuring that the products met customer requirements and industry standards.
- Co-worked with product/reliability engineer on silicon characterization and reliability qualification.
- Embedded non-volatile memory compiler and productization.
- Assisted senior project leader, designed and simulated layouts of large BS and mps.
- Coordinated with test engineer and debugged circuits.
- Managed next-generation Memory IC products.
- Developed transistor level circuit designs and necessary replication.
Experience
7-10 Years
Level
Senior
Education
BSEE
