Emulation Engineer Resume Samples

Description :

1. Created an ASIC chip plus switch subsystem to verify the switching arbitration of the subsystem from Software Models to the Netlist-based emulation.
2. Developed pre-silicon validation content and methodologies. Drove debug efficiency improvements related to Graphics performance debug.
3. Maintained and administered operational rehearsal and operational support networks and LANs.
4. Provided administration and maintenance support to the evaluation laboratory.
5. Installed and managed network technologies. Defined and develop new capabilities & HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-Silicon and post-Silicon functional validation SW development/validation.
6. Built a constrained random environment for various functional blocks for full chip testing.
7. Supported the pursuit, order, and capture process including proposal development, technical approach, and bids for PTS products on GS programs.

Experience

2-5 Years

Level

Executive

Education

Electrical Engineering

Description :

1. Defined and brought up FPGA platforms for pre-silicon validation and software development.
2. Collaborated with ASIC design and verification teams to develop a common environment for ASIC and FPGA.
3. Enhanced and maintained FPGA RTL and simulation changes to improve ASIC emulation.
4. Created and executed test plans for validating SoC functionality and performance.
5. Resolved to challenge system-level issues that span multiple disciplines.
6. Created emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning, and routing tools.
7. Accurately estimated and executed project commitments. 

Experience

2-5 Years

Level

Executive

Education

Electrical Engineering

Description :

1. Defined and documented RTL changes required for emulation/FPGA.
2. Developed hardware and software collaterals and integrates them with the emulation/FPGA model.
3. Tested and debugged the emulation/FPGA model and collaterals.
4. Defined and developed new capabilities & HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for preSilicon and postSilicon functional validation as well as SW development/validation.
5. Developed improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform.
6. Interfaced with and provides guidance to pre-silicon Validation teams for optimizing preSi validation environments, test suites, and methodologies for emulation efficiency.
7. Developed and applied automation aids, flows, and scripts in support of emulation ease of use and improvement of equipment utilization.

Experience

2-5 Years

Level

Executive

Education

Electrical Engineering

Description :

1. Created and maintained scripts, and config scripts for Emulation Model Building. Ran the basic sanity checks for the model releases.
2. Cleaned up, and Generation of Libraries for Model Building, created and maintained emulation top wrapper.
3. Integrated Transactors, Simulation & Emulation Specific files, Memory modules, and other RTL modules.
4. Ran the simulation tests, and generation of Firmware hex files to be loaded onto the Emulation models.
5. Ran and integrated new test cases on Emulation Model to improve the Integrity of the released emulation model.
6. Analyzed and found the root cause of the runtime errors in Emulation and provided solutions/fixes for the customer issues.
7. Experienced with Wrapper Creation, HDL simulation, synthesis, and memory modeling for emulation. Experienced with interfacing and bring-up for emulation transactions. Worked knowledge of Makefiles, Perl, Python & Shell scripts.

Experience

7-10 Years

Level

Executive

Education

Electrical Engineering

Description :

1. Synthesized the Verilog RTL and create models and compile them for Cadence Palladium and Protium platforms. Developed all aspects of hardware emulator implementation, with emphasis on design partitioning, synthesis, place, route, and timing analysis.
2. Worked on third-party IP integration and system-level debugging. Block and system-level RTL simulation & design verification.
3. Supported chip bring-up and post-silicon debug. Worked with architects to select targeted kernels for benchmarking functional performance and timing on simulation and emulation platforms, and correlate timing between the two platforms.
4. Performed feasibility studies to validate performance, functionality, and timing on emulation and simulation platforms. Debuged functional and timing models.
5. Validated the designs for functional and electrical robustness.
6. Worked with the microarchitecture and RTL design team to implement the designs, and develop, modify, and/or test hardware needed at the chip level or block level.
7. Supported and enabled multiple Emulation environments by developing infrastructure using the latest emulation techniques.

Experience

5-7 Years

Level

Executive

Education

Electrical Engineering

Description :

1. Coordinated with software and firmware teams to enable co-emulation and software validation.
2. Maintained regressions and work with vendors to alleviate design synthesis and mapping issues.
3. Experienced with virtualization technologies for emulation like QEMU or Virtual Box. Familiarity with Linux codebase and device drivers.
4. Understood boot loader technologies like UEFI, ACPI, and reboot. Developed BIOS software to configure and bring up server sub-systems.
5. Worked knowledge of PCIe, Ethernet, DDR, SPI, and I2C/I3C protocols.
6. Drove block and full-chip level emulation (FPGA & emulator), and was responsible for QoR (timing, capacity) and debugging.
7. Worked with CPU microarchitecture and design team to understand specifications and design tradeoffs in pipeline and structure sizing to achieve best-in-class performance and power over 3GHz.

Experience

2-5 Years

Level

Executive

Education

Electrical Engineering

Description :

1. Worked as part of a software development team to improve an emulation platform, write hardware emulation models, and write engineering tools based on the emulation platform. 
2. Learned, understood, and implemented hardware emulation of hardware devices such as CPU, RAM, Disk, MMUs, IO, NICs, and System on Chips. 
3. Participated in the software engineering process including testing, peer review, and software release.
4. Understood network protocols (TCP/IP stacks, wire-level protocols, routing protocols, etc.).
5. Familiared with Operating System internals (Linux, Windows, RTOS). Experienced with Continuous Integration systems (Bamboo, Jenkins, Docker, Kubernetes, etc.).
6. Developed, debugged, and deployed emulation-based prototyping platforms for complex chip designs.
7. Collaborated with architecture, design, and verification teams to resolve dependencies and drive test plan execution.

Experience

2-5 Years

Level

Executive

Education

Electrical Engineering

Description :

1. Traveled responsibilities may include site visitation for data gathering and customer interaction.
2. Worked alone or with the project team and communicated well with the project lead and or project manager.
3. Attended and actively participated in project meetings. Understands and follows Kasa Engineering Process Manual procedures.
4. Interpreted a variety of instructions, either written or verbal, diagram or schedule.
5. Communicated effectively with peers in a one-on-one and/or group setting.
6. Calculated figures and amounts, converting them back and forth. Worked independently as well as within a team.
7. Worked with confidential customer data. Worked under stress to meet project deadlines and have attention to detail.

Experience

2-5 Years

Level

Executive

Education

Electrical Engineering

Description :

1. Developed, maintained, and updated custom conveyor modules that mimic real-world physics and geometry needed for emulation.
2. Developed, maintained, and updated internal process documents to aid in consistency from one project to the next.
3. Worked knowledge of scripting and programming languages (i.e. Python, C#, JavaScript, Java).
4. Worked knowledge of PLC Ladder Logic and OPC Communications.
5. Ensured the quality of goods and services to both internal and external customers. Engaged with customers effectively as needed on projects.
6. Worked knowledge of computer-aided drafting and 3D modeling software.
7. Worked with the leading emulation vendors to debug issues, and enhanced capabilities.

Experience

7-10 Years

Level

Management

Education

Electrical Engineering

Description :

1. Ported the design into the emulator, for example, Palladium/Zebu/Veloce. Reworked the testbench to suit the emulator including emulation-specific VIP integration.
2. Ran/Debuged tests, and support others with the same. Develop and maintain the Palladium and Protium emulation platform flows.
3. Supported the users of the platforms across different geographical locations.
4. Continuously evaluated and benchmark new features and systems by working closely with vendors and internal teams to provide the best overall solution to the organization.
5. Designed, implemented, and verified FPGA prototypes of the industry's leading GPUs and SOCs.
6. Worked with architects, designers, software engineers, and verification teams to accomplish your tasks. Developed and operated tests on state-of-the-art emulators and in post-silicon validation and assist in bring-up processes from prototyping through post-silicon validation.
7. Crafted standalone test cases for tool issues encountered in the emulation compile and runtime flows.

Experience

2-5 Years

Level

Executive

Education

Electrical Engineering